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DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
PC8100GR
SILICON UP/DOWN CONVERTERS IC FOR 800 MHz to 900 MHz MOBILE COMMUNICATIONS
DESCRIPTION
PC8100GR is a silicon monolithic integrated circuit designed as up/down converters for 800 MHz to 900 MHz mobile
communications, mainly CT2. This IC consists of upconverter and downconverter, which are packaged in 20 pin SSOP. Quadrature modulator IC (PC8101GR) is also available as for kit-use with this IC. So, these pair devices contribute to make RF block small, high-performance and low power-consumption. This product is manufactured using NEC's 20 GHz fT NESATTMIII silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion and migration. Thus, this product has excellent performance, uniformity and reliability.
FEATURES
* Operating frequency - fRF = 800 MHz to 900 MHz, fIF = 50 MHz to 150 MHz, fLo = 650 MHz to 1 050 MHz * Upconverter and downconverter are integrated in 1 chip. * 20 pin SSOP suitable for high-density surface mounting. * Wide operating voltage VCC = 2.7 to 4.5 V * Equipped with Power Save Function. * Excellent linearity
APPLICATIONS
* Typical application - Digital cordless phone CT2. * Further application - Digital cellular, etc.
ORDERING INFORMATION
PART NUMBER PACKAGE 20 pin plastic SSOP (225 mil) SUPPLYING FORM Embossed tape 12 mm wide. QTY 2.5 kp/Reel. Pin 1 indicates roll-in direction of tape.
PC8100GR-E2
Remark To order evaluation samples, please contact your local NEC sales office. (Order number: PC8100GR)
Caution electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. P10817EJ3V0DS00 (3rd edition) Date Published October 1999 N CP(K) Printed in Japan The mark shows major revised points.
(c)
1995,1999
PC8100GR
INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS
(Top View)
20 19 18 17 16 15 14 13 12 11
REG. REG.
1 2 3 4 5 6 7 8 9 10
1. GND 1 2. RF BYPASS 3. RF INPUT 2 4. PEAKING OUT 3 5. P/S (for DOWN CONV.) 4 6. P/S (for UP CONV.) 5 7. VCC (for UP CONV.) 8. RF OUTPUT 6 9. GND 7 10. MIX OUTPUT1 8 11. MIX OUTPUT2 12. GND 9 13. IF BYPASS 10 14. IF INPUT 15. OSC INPUT (for UP CONV.) 16. OSC BYPASS (for UP CONV.) 17. OSC BYPASS (for DOWN CONV.) 18. OSC INPUT (for DOWN CONV.) 19. VCC (for DOWN CONV.) 20. IF OUTPUT
20 19 18 17 16 15 14 13 12 11
2
Data Sheet P10817EJ3V0DS00
PC8100GR
PIN EXPLANATION
PIN NO. 1 ASSIGNMENT APPLIED VOLTAGE (V) 0.0 PIN VOLTAGE (V) - FUNCTION AND APPLICATION EQUIVALENT CIRCUIT
GND
Ground for downconverter. Must be connected to the system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible. (Track length should be kept as short as possible.)
2
RF bypass
-
1.1
Bypass of RF input for downconverter.
VCC
3
RF input
-
0.9
This pin is RF input for downconverter designed as double balanced mixer. This high-impedance input should be matched with external chip inductor. (eg 4.7 nH).
3 4 REG. REG. 2
4
Peaking out
-
0.12
Open emitter pin of low noise amplifier. Grounded with capacitor (eg 3 pF) and register (eg 22 ) serially.
5
Power-save pin for downconverter
0 to 4.5
-
This pin can control downconverter's ON/OFF operation with bias as follows; Bias: V VPS 1.8 0 to 1.0 Operation ON OFF
5
6 Power-save pin for upconverter VPS 0 to 4.5 - This pin can control upconverter's ON/ OFF operation with bias as follows; Bias: V 1.8 0 to 1.0 Operation ON OFF
or
6
7
VCC for upconverter
2.7 to 4.5
-
Supply voltage for upconverter. Must be connected bypass capacitor (e.g 1 000 pF) to minimize ground impedance.
REG.
8
8
RF output
same as VCC through intactor
-
F output from upconverter. Connect the VCC through inductor (eg 15 nH).
9
GND
0.0
-
Ground for RF amplifier of upconverter.
Data Sheet P10817EJ3V0DS00
3
PC8100GR
PIN EXPLANATION
PIN NO. 10 11 ASSIGNMENT MIX OUT 1 MIX OUT 2 PIN VOLTAGE (V) 2.3 2.3 FUNCTION AND APPLICATION Mixer output from upconverter. Mixer output from upconverter. 10 and 11 pins should be externally equipped with tank circuit of inductor (eg 4.7 nH) and capacitor (eg 3.5 pF). EQUIVALENT CIRCUIT
10
12 GND 0* Ground for oscillator buffer amplifier and mixer of upconverter. Must be connected to the system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible. (Track length should be kept as short as possible.) 13 14 IF bypass IF input 1.03 1.03 Bypass of IF input for upconverter. This pin is IF input for upconverter designed as double balanced mixer. This high-impedance input should be externally equipped with matching circuit of inductor (eg 220 nH) and capacitor (eg 1.5 pF). 15 OSC input (for upconverter) 16 OSC bypass (for upconverter) 17 OSC bypass (for downconverter) 18 OSC input (for downconverter) 19 VCC supply for for downconverter 2.7 to 4.5* 1.85 Local oscillator input for downconverter. Required for matching with register 51 . Supply voltage for downconverter. It must be connected bypass capacitor (e.g 1 000 pF) to minimize ground impedance. 20 IF output 1.45 IF output from downconverter. 1.85 1.8 1.8 Local oscillator input for upconverter. Required for matching with register 51 . Bypass of local oscillator input for upconverter. Bypass of local oscillator input for downconverter.
11 VCC
14
13
REG.
VCC
15 , 18
16 , 17
VCC
20
* Externally supply voltage
4
Data Sheet P10817EJ3V0DS00
PC8100GR
ABSOLUTE MAXIMUM RATINGS
Supply Voltage Power Dissipation of package allowance Operating Temperature Storage Temperature Topt Tstg VCC PD TA = +25 C Mounted on 50 x 50 x 1.6 mm double copper clad epoxy glass board at TA = +70 C -20 to +70 -65 to +150 C C 5.0 530 V mW
RECOMMENDED OPERATING CONDITIONS
PARAMETERS Supply Voltage Operating Temperature SYMBOL VCC Topt MIN. 2.7 -20 TYP. 3.0 +25 MAX. 4.5 +70 UNIT V C
ELECTRICAL CHARACTERISTICS (TA = +25 C, VCC = 2.7 V, ZL = ZS = 50 , unless otherwise specified; VP/S 1.8 V)
PARAMETERS UPCONVERTER BLOCK*1 Circuit current Conversion gain RF output level Noise figure Local leakage at RFout IF leakage at RFout Circuit current in power-save mode*3 Power-save control voltage ICC CG PRFout NF Lorf IFrf ICC(P/S) VP/S(ON) VP/S(OFF) Rise up time DOWNCONVERTER BLOCK*2 Circuit current Conversion gain IF output level 3rd order intermodulation distortion ICC CG PIFout IM3 8.0 15.0 -4.5 -45.0 15.0 18.0 -2.0 -49.0 22.0 23.0 mA dB dBm dBc No input signal PRFin = -40 dBm PRFin = -10 dBm, 50 load fRFin1 = 866.4 MHz, PRFin1 = -40 dBm fRFin2 = 866.8 MHz, PRFin2 = -40 dBm Noise figure Circuit current in power-save mode*3 Power-save control voltage NF ICC(P/S) VP/S(ON) VP/S(OFF) Rise up time Tup 2.5 1.8 7.5 220 10 350 4.5 1.0 5.0 dB DSB mode 5PIN(P/S) 1.0 V Tup 2.5 1.8 13.0 17.5 0 25.0 20.5 3 13 -25.0 -12.0 220 18 -10.0 -5.0 350 4.5 1.0 5.0 35.0 25.5 mA dB dBm dB dBm dBm No input signal PIFin = -40 dBm PIFin = -10 dBm, 50 load DSB mode PIFin = -10 dBm PIFin = -10 dBm 6PIN(P/S) 1.0 V SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS
A
V V
s
A
V V
s
*1 : fIFin = 150.05 MHz, fRFout = 864.05 to 868.05 MHz fLoin = 1014.10 to 1018.1 MHz (-9 dBm) *2 : fRFin = 864.05 to 868.05 MHz, fIFout = 150.05 MHz fLoin = 1014.10 to 1018.1 MHz (-9 dBm) *3 : Circuit current in power-save mode is total value of upconverter+downconverter
Data Sheet P10817EJ3V0DS00
5
PC8100GR
STANDARD CHARACTERISTIC FOR REFERENCE (TA = 25 C, VCC = 2.7 V, ZL = ZS = 50 , unless otherwise specified; VP/S 1.8 V)
PARAMETERS UPCONVERTER BLOCK 3rd order intermodulation distortion IM3 -39.0 dBc fIFin1 = 150.4 MHz, PIF1 = -30 dBm fIFin2 = 150.8 MHz, PIF2 = -30 dBm SYMBOL REFERENCE UNIT TEST CONDITIONS
DOWNCONVERTER BLOCK IF output 1 dB compression Local leakage at IFout Pin RF leakage at IFout Pin P1dB Loif RFif -7.0 -29.0 -44.0 dBm dBm dBm Pin = -40 dBm Pin = -40 dBm
6
Data Sheet P10817EJ3V0DS00
PC8100GR
TEST CIRCUIT
Signal Generator (LO)
(IF) Spectrum Analyzer 50 51 51 W 1.5 pF 220 nH 30 pF 120 pF 120 pF 14
IFin
(IF) Signal Generator 50
120 pF
1 500 pF
30 pF 30 pF 30 pF 20
IFout
19
VCC (D)
18
LOin (D)
17
LOby (D)
16
LOby (U)
15
LOin (U)
13
IFby
12
GND
11
MIXout2
PC8100GR
PEAKINGout
4.7 nH
P/S (D)
P/S (U)
VCC (U)
1
2
3
4
5
6
7
8
9
10
120 pF 120 pF 3 pF 22 Signal Generator 50 4.7 nH 180 pF 15 nH 4.7 nH 1 500 pF 50 120 pF Spectrum Analyzer
MIXout1
GND
GND
RFby
RFin
RFout
Data Sheet P10817EJ3V0DS00
7
PC8100GR
TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD
IC MOUNTED SIDE
OSC IN NEC
PC8100
30 pF 30 pF
OSC IN
120 pF Trimer condenser
RF IN
120 pF
4.7 nH
IF IN
22
3 pF
RF OUT
IF OUT
COMPONENT MOUNTED SIDE
OSC IN
pF
51 30 pF 51 30 pF 120 pF
120
1
OSC IN
F .5 p
150 nH IF IN 0 RF IN
120 pF 22 nH 4.7 nF IF OUT
4.7 nF 120 pF
RF OUT
8
Data Sheet P10817EJ3V0DS00
PC8100GR
TYPICAL PERFORMANCE (Unless otherwise specified VCC = 2.7 V Vps 1.8 V)
- Downconverter block -
RF input frequency vs. Noise figure 15.0 20.0 Vcc = 2.7 V LO sweep (-9 dBm) RF input frequency vs. Conversion Gain
TA = +25 C TA = +80 C TA = -30 C 10.0
Conversion Gain CG (dB)
Noise Figure NF (dB)
15.0 Vcc = 2.7 V LO sweep (-9 dBm) RF sweep (-40 dBm) IF = 150 MHZ 10.0 100 500
5.0 100
TA = +25 C TA = +80 C TA = -30 C 1000
500
1000
RF input frequency fRFin (MHZ)
RF input frequency fRFin (MHZ)
15.0
RF input frequency vs. Noise figure
25.0
RF input frequency vs. Conversion Gain
TA = +25 C TA = +80 C TA = -30 C 10.0
Conversion Gain CG (dB)
Vcc = 4.5 V LO sweep (-9 dBm)
Noise Figure NF (dB)
20.0
5.0 100
500
1000
15.0 Vcc = 4.5 V LO sweep (-9 dBm) RF sweep (-40 dBm) IF = 150 MHZ 10.0 100 500
TA = +25 C TA = +80 C TA = -30 C 1000
RF input frequency fRFin (MHZ)
RF input frequency fRFin (MHZ)
IF output level PRFout, 3rd order distortion IM3 (dBm)
RF input level vs. IF output level and IM3 10 0 25
LO input level vs. Conversion Gain Vcc = 2.7 V RF = 866 MHZ (- 40 dBm) LO = 1016 MHZ (- 9 dBm)
Conversion Gain CG (dB)
-10 -20 -30 -40 -50 -60 -70 -80 -40 -30 -20 -10 TA = +25 C TA = +80 C TA = -30 C 0 10 Vcc = 2.7 V RF1 = 866.4 MHZ RF2 = 866.8 MHZ LO = 1016 MHZ (-9 dBm)
20
15
10 TA = +25 C TA = +80 C TA = -30 C -6 -3 0
5 -27 -24 -21 -18 -15 -12 -9
RF input level PRFin (dBm)
LO input level PLOin (dBm)
Data Sheet P10817EJ3V0DS00
9
PC8100GR
- Downconverter block -
RF input level vs. IF output level and IM3 10 25 LO input level vs. Conversion Gain
IF output level 3rd order distortion IM3 (dBm)
0
-20 -30 -40 -50 -60 -70 -80 -40 -30 -20 -10 TA = +25 C TA = +80 C TA = -30 C 0 10 Vcc = 4.5 V RF1 = 866.4 MHZ RF2 = 866.8 MHZ LO = 1016 MHZ (- 9 dBm)
Conversion Gain CG (dB)
-10
20
15 Vcc = 4.5 V RF = 866 MHZ (-40 dBm) LO = 1016 MHZ (-9 dBm) 10 TA = +25 C TA = +80 C TA = -30 C 5 -27 -24 -21 -18 -15 -12 -9 -6 -3 0
RF input level PRFin (dBm)
LO input level PLOin (dBm)
P/S control voltage vs. Circuit Current 30.0 Vcc = 2.7 V 30.0
P/S control voltage vs. Circuit Current Vcc = 4.5 V
25.0
25.0
Circuit Current Icc (mA)
20.0
Circuit Current Icc (mA)
TA = +25 C TA = +80 C TA = -30 C 0 1.0 2.0 3.0 4.0 5.0
20.0
15.0
15.0
10.0
10.0
5.0
5.0
TA = +25 C TA = +80 C TA = -30 C 0 1.0 2.0 3.0 4.0 5.0
0
0
Power-save-control voltage VP/S Supply voltage vs. Circuit Current 50 Vcc = VP/S 40
Power-save-control voltage VP/S
Circuit Current Icc (mA)
TA = +25 C TA = +80 C TA = -30 C 30
20
10
0
0
1.0
10
4.0 4.5 5.0 2.73.0 Supply Voltage Vcc (V)
2.0
Data Sheet P10817EJ3V0DS00
PC8100GR
- Upconverter block -
F input level vs. RF outpint level and IM3 10
RF output level 3rd order distortion IM3 (dBm)
LC input level vs. Conversion Gain 25
0
Conversion Gain CG (dB)
-10 -20 -30 -40 -50 -60 -70 -80 -40 -30 -20 -10 TA = +25 C TA = +80 C TA = -30 C 0 10 Vcc = 2.7 V IF1 = 150.4 MHZ IF2 = 150.8 MHZ LO = 1016 MHZ (- 9 dBm)
20
15 Vcc = 2.7 V IF = 150 MHZ (-40 dBm) LO = 1016 MHZ 10 TA = +25 C TA = +80 C TA = -30 C -27 -24 -21 -18 -15 -12 -9 -6 -3 0
5
IF input level PRFin (dBm) Pin - Pout, IM3 10
RF output level 3rd order distortion IM3 (dBm)
LO input level PLOin (dBm) LO input level - CG 25
0
Conversion Gain CG (dB)
-10 -20 -30 -40 -50 -60 -70 -80 -40 -30 -20 -10 TA = +25 C TA = +80 C TA = -30 C 0 10 Vcc = 4.5 V IF1 = 150.4 MHZ IF2 = 150.8 MHZ LO = 1016 MHZ (-9 dBm)
20
15 Vcc = 2.7 V IF = 150 MHZ (-40 dBm) LO = 1016 MHZ 10 TA = +25 C TA = +80 C TA = -30 C -27 -24 -21 -18 -15 -12 -9 -6 -3 0
5
IF input level PRFin (dBm)
LO input level PLOin (dBm)
Data Sheet P10817EJ3V0DS00
11
PC8100GR
- Downconverter block -
P/S control voltage vs. Circuit Current 50 Vcc = 2.7 V No input signal 40 40 50 Vcc = 4.5 V No input signal P/S control voltage vs. Circuit Current
Circuit Current Icc (mA)
Circuit Current Icc (mA)
30
30
20
20 TA = +25 C TA = +80 C TA = -30 C
10
TA = +25 C TA = +80 C TA = -30 C 0 1.0 2.0 3.0 4.0 5.0
10
0
0
0
1.0
2.0
3.0
4.0
5.0
Power-save-control voltage VP/S
Power-save control voltage VP/S
Supply voltage vs. Circuit Current 50 Vcc = VP/S No input signal 40
Circuit Current Icc (mA)
TA = +25 C TA = +80 C TA = -30 C 30
20
10
Recommended operating range 0 1.0 2.0 2.73.0 4.0 4.5 5.0
0
Supply Voltage Vcc (V)
12
Data Sheet P10817EJ3V0DS00
PC8100GR
TYPICAL APPLICATION
CT2 BLOCK DIAGRAM
RX
DEMO
I Q
PLL SW PLL
PG131GR
I 0 TX F/F 90 Q
PC8100GR PC8101GR
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
Data Sheet P10817EJ3V0DS00
13
PC8100GR
PACKAGE DIMENSIONS 20 PIN PLASTIC SSOP (225 mil) (UNIT: mm)
20 11
detail of lead end
3-3
+7
1 6.7 0.3
10
1.8 MAX. 1.5 0.1
6.4 0.2 4.4 0.1 1.0 0.2
0.5 0.2 0.65 0.22 -0.05 0.1 0.1
+0.10
0.15 0.10 M
0.15 0.575 MAX.
+0.10 -0.05
NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.
14
Data Sheet P10817EJ3V0DS00
PC8100GR
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electrostatic sensitive devices. (2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent undesired oscillation). (3) Keep the track length of the ground pins as short as possible. (4) Connect a bypass capacitor (e.g. 1 000 pF) to the VCC pin.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered in the following recommended conditions. Other soldering method and conditions than the recommended conditions are to be consulted with our sales representatives.
PC8100GR
Soldering process Infrared ray reflow
Soldering conditions Peak package's surface temperature: 235 C or below, Reflow time: 30 seconds or below (210 C or higher), Number of reflow process: 2, Exposure limit*: None Peak package's surface temperature: 215 C or below, Reflow time: 40 seconds or below (200 C or higher), Number of reflow process: 2, Exposure limit*: None Solder temperature: 260 C or below, Flow time: 10 seconds or below Number of flow process: 1, Exposure limit*: None Terminal temperature: 300 C or below, Flow time: 10 seconds or below, Exposure limit*: None
Symbol
IR35-00-2
VPS
VP15-00-2
Wave soldering
WS60-00-1
Partial heating method
*:
Exposure limit before soldering after dry-pack package is opened. Storage conditions: 25 C and relative humidity at 65 % or less.
Note:
Apply only a single process at once, except for "Partial heating method". For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
Data Sheet P10817EJ3V0DS00
15
PC8100GR
ATTENTION
OBSERVE PRECAUTIONS FOR HANDLING
ELECTROSTATIC SENSITIVE DEVICES
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation. * The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. * No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. * NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. * Descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. * While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. * NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance.
M7 98.8

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